» Linley Newsletter Archive | Subscribe to Linley Newsletter

Linley Newsletter   Analysis of microprocessor and semiconductor developments

Our newsletter is free. To access entire articles please subscribe to Microprocessor Report.

Cadence Mutates Its DNA to Boost AI
Cadence’s new DNA 100 IP core integrates a sparse-compute engine that supports applications ranging from low-power IoT devices to high-performance video surveillance and autonomous vehicles.
Titan IC Floats 100Gbps Reg-Ex Engine
The company’s RXP core delivers leading regular-expression-search throughput for SoC designs and FPGAs. The primary application is in network-security appliances such as intrusion-detection systems and next-generation firewalls.
Turing T4 Targets AI Inference
Nvidia’s new Turing architecture boosts AI inferencing performance by adding integer capability to its tensor cores. The Tesla T4 accelerator brings Turing to data centers as a 70W PCIe card.
Turing Accelerates Ray Tracing
An upgrade to the two-year-old Pascal, Nvidia’s new Turing architecture delivers a big performance boost, AI-enhanced imaging, and real-time ray tracing for PC and professional graphics.
Xilinx Versal Surpasses UltraScale+
Scheduled to sample in mid-2019, Versal chips will combine Arm Cortex-A72 CPUs and new AI Engines with field-programmable logic, redefining FPGAs as full-fledged SoCs.
NetSpeed Disappears Into Intel
Network-on-a-chip (NoC) vendor NetSpeed Systems is now part of Intel, giving it a good exit but leaving its customers without a roadmap and consolidating the NoC market.
NRAM Brings Nanotubes to Silicon
NRAM uses carbon nanotubes (CNTs) in silicon to offer DRAM-like performance and density with nearly unlimited endurance and retention. Products could reach production in 2020.
Marvell Reveals Post-Cavium Roadmap
As Marvell works to integrate its Cavium acquisition, it’s paring unneeded and overlapping product lines. The changes affect both Cavium and Marvell roadmaps.
CPU Performance for the Next Decade
A comprehensive analysis of a decade’s worth of processor data reveals the approaches that have enabled CPU and GPU performance to double every two years and how they will change over time.
Fujitsu Raises Arm Over SPARC
Fujitsu’s Post-K exascale supercomputer will bring Arm into the HPC world with its new 52-core A64FX, an extreme processor for an extreme machine.
Marvell Connects SSDs to Ethernet
Marvell is sampling the 88SN2400, a unique controller chip that connects an SSD to Ethernet, enabling a new storage-array architecture based on Ethernet instead of PCI Express.
DeePhi Accelerates Xilinx AI Strategy
Xilinx recently acquired DeePhi, a developer of FPGA-based accelerators for computer vision and speech recognition, to add to its large library of reference designs that it can offer to its FPGA customers.
Graphcore Makes Big AI Splash
One of the best-funded AI startups is sampling its first product, an accelerator chip that packs 1,216 independent CPUs and matches the performance of Nvidia’s V100 at half the power.
Wear 3100 Boosts Smartwatch Life
Qualcomm has added a real-time controller to its next-generation smartwatch platform, creating a big-small-tiny architecture that extends battery life for Wear OS watches.
5G Raises Handset-RF Complexity
RF architectures will diverge between the new 3.5GHz and millimeter-wave bands being allocated for 5G New Radio. RF-module vendors are slowly disclosing their plans.
  Linley Newsletter Archive | Subscribe to Linley Newsletter

Events

Linley Fall Processor Conference 2018
Covers processors and IP cores used in embedded, communications, automotive, IoT, and server designs.
October 31 - November 1, 2018
Hyatt Regency, Santa Clara, CA
Register Now!
More Events »

Newsletter

Linley Newsletter
Analysis of new developments in microprocessors and other semiconductor products
Subscribe to our Newsletter »