Editor: Linley
Gwennap In This Issue
If you missed our recent seminar on Data Center Networking, you can download the proceedings and get the latest information from Freescale, AMCC, Netronome, Xelerated, Dune Networks, Fujitsu, Finisar, Hifn, Ethernet Alliance, HyperTransport Consortium, and The Linley Group. For a free copy, visit our web site. Save the date! Mark your calendars for November 5 for the Linley Tech seminar on Processors for Networking and Communications to be held at the DoubleTree Hotel in San Jose. The seminar will focus on general-purpose communications processors, high-speed embedded processors, and related technologies. Details of this event will be announced soon. For an idea of what you can expect, check out last year’s detailed program. Sponsored by Freescale, AMCC, LSI, Ikanos, Octasic, Marvell, Sun Microsystems, and Cavium Networks. Freescale Tweaks PowerQuicc Line After announcing plans for a new QorIQ processor family, Freescale continues to enhance its PowerQuicc lineup. Last week, the company announced the MPC8536, an update to the popular MPC8548 family of PowerQuicc processors. The new chip offers a minor performance boost, refreshed interfaces, and new power-saving modes. The MPC8536 uses the same e500 CPU, built in the same 90nm process, as other PowerQuicc chips; its maximum clock speed of 1.5GHz is slightly better than the MPC8548’s due to circuit optimizations. The DRAM interface now supports the newest DDR3 parts, and the chip includes new interfaces such as three USB and two SATA ports, reducing system cost and complexity. The two Gigabit Ethernet ports now support IEEE 1588 synchronization, which is useful in industrial and cellular-infrastructure equipment. The processor adds new "jog" (low speed) and "deep sleep" modes to give software an opportunity to reduce power. The MPC8536 just started general sampling; Freescale expects the chip to reach production in 3Q09. With the 45nm QorIQ processors not due to sample until late this year or early 2009, Freescale is making some final enhancements to the existing PowerQuicc products before switching its efforts onto the new line. The MPC8536 is a small step forward, but it offers several improvements to the line and provides an easy upgrade for most MPC8548-family designs. Designers seeking bigger improvements will have to wait for QorIQ to appear. —Linley Complete coverage of PowerQuicc appears in our report A Guide to High-Speed Embedded Processors. Since announcing its first product last year, processor startup Tilera has made significant progress. The company made waves by packing 64 CPUs onto a single chip, using a mesh interconnect to speed data flowing among the CPUs. This week, Tilera announced an improved architecture, called Tile64Pro, now available in 36- and 64-CPU versions. Despite using the same CPUs at the same clock speed, the company claims its new architecture achieves a 1.5x to 2.5x improvement in performance, mainly through more efficient caching. The new design does a better job of spreading data among the chip’s 64 caches, avoiding the "hot spots" that could bottleneck performance in the initial design. Tile64Pro also includes an extra mesh bus dedicated to cache transactions, and it doubles the amount of instruction cache. Other changes include new multimedia instructions and a more efficient DRAM controller. Tilera is testing the new chip now and intends to sample it next month. Pricing for the new 64-CPU version is $900 in low volume, about the same as for the original version, whereas the 36-CPU version is priced at about half of that level. Tilera has racked up more than 40 customers, including Top Layer, a leading IPS (intrusion prevention system) vendor. About half of the customers are in networking/security, while the other half use the chip for video/multimedia applications. Adoption of the chip has been limited to high-end equipment, but the new 36-CPU version should help expand its markets. With customer momentum and a second-generation product in hand, Tilera is off to a good start. —Linley Complete coverage of Tilera’s architecture appears in our report A Guide to Security Processors and Accelerators.
This week, Xilinx announced its Virtex-5 TXT FPGA product line. The TXT products extend the Virtex-5 line with high-speed GTX transceivers. Each transceiver has an operating range of 500Mbps to 6.5Gbps and has relatively low power dissipation of less than 200mW at the maximum data rate. The TXT products include up to 48 transceivers in a single device, matching the capacity of Altera’s Stratix IV FPGAs. At 8.5Gbps, Altera has a slight edge on the maximum data rate, but Xilinx is planning to sample its TXT before Altera samples its Stratix IV with integrated transceivers. Using 65nm process technology, Virtex-5 TXT may have a cost advantage over Stratix IV. In addition to the new transceivers, the TXT products include logic, flip-flops, RAM, clock/data recovery (CDR) circuits, DSP blocks, PCI Express controllers, and Gigabit Ethernet MACs. Xilinx plans to offer 19 versions with varying numbers of these function blocks. System designers can use the TXT to bridge between 40Gbps or 100Gbps Ethernet and the 120Gbps Interlaken, or between OTU-3 and OC-768, or between SFI-5 and 4xSFI-4.2. In each of these cases, the FPGA can be programmed to perform the MAC or system-interface protocol and the bridging function. The IEEE 802.3ba Task Force has defined the 40G/100G Ethernet physical layer sufficiently to enable FPGA-based designs. Sarance Technologies (Ottawa, Canada) provides FPGA IP for a 100GbE MAC as well as for Interlaken. Because these standards rely on 10Gbps links, the TFT requires an external converter to multiplex two 5Gbps connections for each 10Gbps link. We expect the leading optical PHY vendor to announce such a device by the end of the year. At $500, the Virtex-5 TXT is expensive, but it is a key enabler for OEMs building 40GbE and 100GbE prototype systems and test equipment. —Jag Additional coverage of Virtex-5 appears in our report A Guide to High-Speed Interconnects. Last month, Gennum expanded its PCI Express portfolio with the addition of the first four-lane PCIe to local-bus bridge. The GN4124 includes the PCIe PHY as well as the PCIe protocol controller. The GN4124’s four PCIe lanes enable 10Gbps raw throughput (8Gbps after 8b/10b encoding overhead). The device is suitable for embedded applications such as test equipment, broadcast video, industrial control, and medical equipment. In many cases, these applications use FPGAs, so Gennum provides a royalty-free local-bus design that can be embedded into an FPGA. This IP block allows a designer to reduce development time while using low-cost and low-power FPGAs. --Jag Additional coverage of Gennum’s PCI Express products appears in our report A Guide to High-Speed Interconnects. Last week, Freescale announced an agreement to acquire privately-held Intoto for an undisclosed sum. Founded in 1998, Intoto is headquartered in Silicon Valley, but the majority of its employees are in Hyderabad, India. As of April 2008, Intoto had a staff of 176. The startup raised an undisclosed amount of funding from AsiaTech and an unnamed strategic investor. Targeting OEMs/ODMs, Intoto’s products include turnkey software for security appliances and business gateways. Freescale does not appear interested in Intoto’s products but rather in using the team to develop application software for its QorIQ multicore processors. The acquisition gives Freescale an intact and proven development team with multicore software experience. We expect this team to both develop both standard and custom software components for QorIQ customers. —Bob Additional coverage of Freescale appears in our report A Guide to High-Speed Embedded Processors.
A Guide to 10G Ethernet Adapters and Controller Chips has been extensively updated to cover the newest chip- and board-level products for 10GbE server connections as well as software updates (firmware/drivers) and product roadmaps. The market for 10GbE server connectivity remains extremely dynamic with rapid shifts in technology and vendor market share. Evaluating the long-term outlook for adapter and controller vendors can be challenging, requiring an in-depth understanding of their products and roadmaps. Only The Linley Group has the background and experience to provide this forward-looking view. Now in its second edition, "A Guide to 10G Ethernet Adapters and Controller Chips" provides a uniquely detailed look at the vendors and products in this emerging market. It provides 2007 market-size and vendor-share data for 10GbE NICs as well as a market forecast for 10GbE NIC/LOM shipments through 2012. The report offers complete chapters on the leading 10GbE NIC and controller vendors. Because OEMs source both board-level and chip-level products, we include full coverage and comparisons for both 10GbE NICs and 10GbE controller chips. Major vendors of 10GbE NICs and/or controller chips covered include:
We provide a full chapter of coverage on each of the above vendors. Coverage includes company background information, full details of announced products, product-roadmap information where available, and our conclusions about the vendor and its products. An additional chapter provides coverage of new entrants into the 10GbE NIC/LOM market:
Detailed head-to-head comparisons of the many available NIC/LOM products are included and the report concludes with our outlook for the server market for Ethernet and the leading vendors. Whether you are looking for the right Ethernet adapter or controller for your application or seeking to partner with or invest in a chip vendor, this report will cut your research time and save you money. Make the intelligent decision, order "A Guide to 10G Ethernet Adapters and Controller Chips" today. Order by October 24 and take $300 off the list price. For more information on this report, visit our web site. To receive Linley Wire via e-mail, click here
|
