Linley Spring Processor Conference 2020

Held April 6-9, 2020
Proceedings available

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Agenda for Day Three: Wednesday April 8, 2020
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9:00am-9:40amKeynote Presentation

Advancing Broad AI with Algorithms and Architectures for Digital and Analog AI Acceleration
Geoffrey Burr, Distinguished Research Staff Member, IBM

The rapidly evolving field of AI-hardware accelerators has led to a proliferation of approaches. Most use commercial CMOS technology, and to scale performance, flexibility and accuracy are often traded off. We will present results from our co-development of algorithms and accelerators, including materials and technology innovations, that achieve large gains in performance without degrading flexibility or accuracy. This approach is central to enabling the transition from single-task single-mode "narrow" AI workloads to multi-modal multi-task "broad" AI.

9:40am-9:50amQuestion and Answer
9:50am-10:00amBreak Sponsored by The Linley Group
10:00am-12:00pm5G and AI at the Network Edge

As cloud services rise in popularity, service providers are pushing compute closer to the edge of the network to reduce response time. Many of these new services have an AI component. The recent launch of initial 5G networks provides additional opportunities for edge deployments. This session, led by The Linley Group principal analyst Bob Wheeler, discusses these trends and how they affect processor design.

An Event-Driven Architecture for 5G Baseband Processing
Tejas Bhatt, VP & CTO of Wireless Platforms, Marvell

The convergence of new use cases and high-capacity air interfaces presents a complex set of challenges to 5G base-station designers. To meet these challenges, systems require an event-driven architecture that efficiently separates the control plane from signal processing. This presentation will discuss how Octeon Fusion baseband processors provide a centralized hardware scheduler that allows massively parallel computing capabilities with flexibility and scalability by offloading tasks that include scheduling, chaining, and monitoring across CPUs, DSPs, hardware accelerators, and front-haul interfaces.

10:20am-10:30amQuestion and Answer

What Does Security Look Like When 5G Meets AI?
Neeraj Paliwal, VP and GM of Security Business Unit, Rambus

5G represents a revolution in mobile technology with performance that will rival that of wireline networks. 5G's Ultra-Reliable Low Latency Communication (uRLLC) links will enable a profusion of AI-powered devices from delivery drones to smart cities. Given the great value and potential risks, it is critical to protect the data, devices and infrastructure resulting from the confluence of 5G and AI. This presentation will discuss the threats to, and the security solutions that can safeguard, the emerging 5G+AI world.

10:50am-11:00amQuestion and Answer

I/O Processing Units and AI Processing at the Edge
Kevin Deierling, Sr. Vice President of Marketing, Mellanox

The coming explosion of AI-driven edge applications will be driven by the dramatic performance increase of new 5G networks. But these new applications will need more than just lower latency and higher throughput; they must capture, store, share, slice, transport, and process data securely, efficiently, and in real-time. This presentation will discuss the latest advancements in the I/O processing units (IPUs) and smart NICs that will enable these powerful new AI-driven, virtualized, and software-defined edge applications.

11:20am-11:30amQuestion and Answer
11:30am-11:50amCentaur Technology

World’s First High-Performance x86 with Integrated AI Coprocessor
Glenn Henry, Chief AI Architect, Centaur Technology

Edge servers need efficient AI acceleration for emerging applications as well as powerful x86 CPUs for legacy software. Integration is required to meet the tight space, power, and cost limits of edge systems. This presentation describes the industry's first integrated AI coprocessor for x86 systems. It delivers high performance and efficiency on deep-learning applications, eliminating the need for a bulky and expensive GPU card. The SoC features eight x86 cores and a 20-TOPS coprocessor with 20 TB/s of memory bandwidth.

11:50am-12:00pmQuestion and Answer
12:00pm-1:00pmBreakout sessions with today's speakers


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