Linley Fall Processor Conference 2020

Held October 20-22 and 27-29, 2020
Proceedings available

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Agenda for Day Four: Tuesday October 27, 2020
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What TinyML Needs from Hardware
Pete Warden, Technical Lead for TensorFlow Micro, Google

Machine learning is becoming an increasingly important workload for embedded systems, but its requirements on hardware are not well-understood. This keynote presentation will discuss what product teams have been asking for, and how hardware can help them build new features, and new applications. It will cover topics like cascaded networks to help duty-cycle high-accuracy, high-power models by gatekeeping them with smaller models on low-power hardware, how accelerators can be useful, and thinking about the whole system design when optimizing solutions.

9:20am-9:30amBreak Sponsored by Intel
9:30am-11:30amSession 6: The New Infrastructure Edge

As cloud services rise in popularity, service providers are pushing compute closer to the edge of the network to reduce response time. Acceleration is an important element in delivering these latency-sensitive services. This session, led by The Linley Group principal analyst Bob Wheeler, discusses how hardware and software advances are enabling AI at the infrastructure edge.

Software Optimization of High-Performance x86 with Integrated AI Coprocessor
Mike Thomson, CPU, Neural and Performance Engineer, Centaur Technology

After Centaur introduced the industry’s first integrated AI Coprocessor for x86 systems, continued software advancements have more fully unlocked the heterogeneous SoC’s capabilities. Adoption of MLIR has enhanced the software and compiler infrastructure, and creation of multiple levels of intermediate representations has enabled more advanced optimizations than were present in our previous system. These advancements are likewise advantageous for other developers that turn to MLIR in hopes of finding a "Holy Grail" compiler technology for heterogeneous SoC solutions.

A New FPGA Architecture Optimized for AI Acceleration
Martin Langhammer, Sr. Principal Engineer, Intel

The dataflow flexibility of spatial architectures allows for the possibility of a higher "sustained to peak" TOPs/TFLOPs ratio. In this presentation we will describe the architecture of the Stratix 10 NX family, AI optimized FPGAs which contain a matrix of almost 4,000 AI tensor blocks, providing 130 TOPs/TFLOPs INT8/FP16 or 260 TOPs/TFLOPs INT4/FP12 peak performance. Large on board HBM stacks enable single node capability, and multiple banks of high-speed transceivers allow distributed or unrolled algorithms across the datacenter.

Integrated Training and Inference Solution for AI at the Edge
Moshe Mishali, CTO and Cofounder, Deep AI

Training deep-learning models requires large compute resources and is performed in the cloud or data centers. Yet the data is generated at the edge, and transporting it to the cloud leads to unsustainable network bandwidth, high cost, slow responsiveness and compromises data privacy. This presentation will disclose Deep-AI's accelerated deep-learning solution for the edge, which implements training at fixed-point INT8 coupled with high sparsity, to enable deep learning at a fraction of the cost and power of GPU systems.

Thinking on the Edge: How the AI Edge will become Accelerated, Automated, & Autonomous
Justin Boitano, VP & GM, Enterprise & Edge Computing, Nvidia

Edge is often viewed as a geographical concept. In fact Edge is a new way of thinking about computing, communication, and collaboration; that makes the previously impossible, … possible. Edge platforms will enable a new class of applications that are accelerated, autonomous, and enabled by artificial intelligence. To realize this vision requires a platform of unmatched CPUs, GPUs, and DPUs. But even more importantly, it requires a new framework that extends the scope of human intelligence across the entirety of the world’s greatest challenges.

There will be Q&A and a panel discussion featuring the above speakers.

11:30am-12:30pmBreakout sessions with today's speakers
1:30pm-3:30pmSpeaker 1:1 Meetings


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