Google’s Tensor DLA Lags in Area, Speed
Among flagship-smartphone processors, Google’s first custom design has the largest AI engine but the worst AI performance. In contrast, the Dimensity 9000’s AI engine is the most efficient.
Among flagship-smartphone processors, Google’s first custom design has the largest AI engine but the worst AI performance. In contrast, the Dimensity 9000’s AI engine is the most efficient.
Intel Finally Gives Up on Optane
Intel and Micron have developed a revolutionary new memory technology called 3D XPoint, but under the Optane brand it never met expectations as either an SSD or DIMM replacement.
Intel and Micron have developed a revolutionary new memory technology called 3D XPoint, but under the Optane brand it never met expectations as either an SSD or DIMM replacement.
TI AM625 Updates Industrial SoCs
TI has updated its low-cost SoC family with 64-bit CPUs, lower power, and improved security and functional-safety support, enabling it to target automotive as well as industrial applications.
TI has updated its low-cost SoC family with 64-bit CPUs, lower power, and improved security and functional-safety support, enabling it to target automotive as well as industrial applications.
Apple Loses GPU-Performance Lead
Our die-photo analysis reveals that Samsung devoted too little area to its AMD-powered GPU, contributing to its performance shortfall. MediaTek and Intel both outperform the latest Apple chip.
Our die-photo analysis reveals that Samsung devoted too little area to its AMD-powered GPU, contributing to its performance shortfall. MediaTek and Intel both outperform the latest Apple chip.
Intel Shines Light on Copackaged Optics
Intel’s eight-laser silicon-photonics research chip could be a breakthrough for copackaged optics. It places the laser array on a silicon chip that can eventually be integrated in the package.
Intel’s eight-laser silicon-photonics research chip could be a breakthrough for copackaged optics. It places the laser array on a silicon chip that can eventually be integrated in the package.
Qualcomm Leaps Forward With W5+
Qualcomm has updated its smartwatch platform with new chip designs. Reduced power enables a visible watch face even when idle; reduced chipset area enables smartwatches that operate globally.
Qualcomm has updated its smartwatch platform with new chip designs. Reduced power enables a visible watch face even when idle; reduced chipset area enables smartwatches that operate globally.
Enlightra Team Demos Photonic AI Engine
A research team led by Enlightra’s founders demonstrated a new method of photonic AI inference that is smaller than earlier photonics implementations. Using photonics also provides opportunities for resource sharing that aren’t available with electronics.
A research team led by Enlightra’s founders demonstrated a new method of photonic AI inference that is smaller than earlier photonics implementations. Using photonics also provides opportunities for resource sharing that aren’t available with electronics.
MediaTek Delivers Efficient Cortex-X2
Our die-photo analysis reveals that the Dimensity 9000 features the smallest Cortex-X2 design, but Apple’s Avalanche CPU still leads in performance and power efficiency.
Our die-photo analysis reveals that the Dimensity 9000 features the smallest Cortex-X2 design, but Apple’s Avalanche CPU still leads in performance and power efficiency.
OEMs Lack Good Value Options
Overly cautious about rising development costs and risk, vendors aren’t refreshing their lower-cost processors, hurting themselves and customers. They must consider business cases other than merely chasing the biggest customers.
Overly cautious about rising development costs and risk, vendors aren’t refreshing their lower-cost processors, hurting themselves and customers. They must consider business cases other than merely chasing the biggest customers.
Cadence Cuts ConnX Costs
New ConnX 110 and 120 DSP cores upgrade the company’s BBE DSPs and are compatible with the higher-performance ConnX B10 and B20. They target wireless communications, radar, and lidar.
New ConnX 110 and 120 DSP cores upgrade the company’s BBE DSPs and are compatible with the higher-performance ConnX B10 and B20. They target wireless communications, radar, and lidar.
MCX Unifies NXP Microcontrollers
NXP is unifying its microcontroller offering with the new MCX family. Although this doesn’t indicate the end of the older families, it will be the focus for new designs that need modern features.
NXP is unifying its microcontroller offering with the new MCX family. Although this doesn’t indicate the end of the older families, it will be the focus for new designs that need modern features.
Nanometer Nonsense
Both leading foundries allowed customers to claim they were using a 4nm process when, in fact, they were using 5nm technology. This situation renders node names meaningless.
Both leading foundries allowed customers to claim they were using a 4nm process when, in fact, they were using 5nm technology. This situation renders node names meaningless.
Gaudi2 Makes Impressive MLPerf Debut
In the latest round of MLPerf Training results, Graphcore’s Bow offers a modest improvement and Habana’s Gaudi2 triples performance over its predecessor, vaulting past Nvidia’s A100 on one benchmark.
In the latest round of MLPerf Training results, Graphcore’s Bow offers a modest improvement and Habana’s Gaudi2 triples performance over its predecessor, vaulting past Nvidia’s A100 on one benchmark.
Imagination Launches RISC-V Core
Imagination Technologies has unveiled its first Catapult family member. Based on the RISC-V architecture, the CPU core targets real-time applications, putting Cortex-R52 in its sights.
Imagination Technologies has unveiled its first Catapult family member. Based on the RISC-V architecture, the CPU core targets real-time applications, putting Cortex-R52 in its sights.
RISC-V Extension Eliminates Division
RISC-V International, the governing body of the open-standard instruction set, recently approved four new specifications that address multiplication, bootloaders, and debugging, reducing the gap with Arm.
RISC-V International, the governing body of the open-standard instruction set, recently approved four new specifications that address multiplication, bootloaders, and debugging, reducing the gap with Arm.
