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Microchip Previews RISC-V FPGAs

January 22, 2019

Author: Bob Wheeler

Moving from RISC-V evangelist to committed customer, Microchip is developing SoC FPGAs using cores from SiFive. With most versions of its PolarFire FPGA now shipping, the former Microsemi is previewing what’s next while stopping short of a product announcement. Due to sample in 2H19, the SoC FPGAs combine the PolarFire FPGA design with SiFive’s U54-MC complex, comprising quad 64-bit application cores, a 64-bit monitor core, and a 2MB L2 cache.

The PolarFire SoC architecture includes a hardened 32-bit DDR4/LPDDR4 controller as well as processor-boot memories. This design enables the U54-MC processor complex to boot and run without consuming any FPGA resources. Although Microchip withheld details, the processor can also directly access certain I/Os; PolarFire includes, for example, dual PCI Express Gen2 controllers.

Although Microchip is first to integrate hard RISC-V CPUs, SoC FPGAs are far from new. Since 2013, the company (then Microsemi) has shipped SmartFusion2 FPGAs with an integrated Arm Cortex-M3 microcontroller. Sporting up to 150,000 LUTs, SmartFusion2 sits below PolarFire in logic density. Meanwhile, both Intel (Altera) and Xilinx have shipped multiple SoC-FPGA generations that integrate Arm Cortex-A CPUs capable of running Linux.

Subscribers can view the full article in the Microprocessor Report.

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