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Helios Expands Arm’s Neoverse

February 26, 2019

Author: Mike Demler

Arm code-named its new CPU architecture Helios after the Greek god of the sun. Although the core can’t fuse atoms to create energy, it does fuse two processing threads to boost throughput. It’s the first Arm design with simultaneous multithreading (SMT), joining Ares in the company’s Neoverse lineup. Helios appears in Arm’s Neoverse E1 CPU, which targets high-bandwidth edge gateways and infrastructure, and in Cortex-A65AE, a multithreaded CPU for automotive systems.

Helios is a successor to the architecture in the “little” Corex-A55, but it has features previously available only in the “big” Cortex-A CPUs, including out-of-order (OOO) execution and a three-wide instruction-issue queue. The OOO capability works with a nonblocking-cache subsystem, reducing the effect of pipeline stalls caused by cache misses. On typical data-transport workloads, a single-thread Neoverse E1 incurs 20–30% fewer stalls than a Cortex-A55, and multithread operation eliminates an additional 10–25%.

The A65AE employs essentially the same architecture as the Neoverse E1, but it adds a new split-lock mode that Arm introduced in 3Q18 with Cortex-A76AE. Split-lock enables two CPUs in a cluster to run the same instructions in lockstep, meeting the redundancy requirement for ISO 26262 ASIL D safety, or to operate independently after a system reboot. System designers can use this mode to retain some functions after a CPU failure or to increase performance for non-safety-critical functions.

Subscribers can view the full article in the Microprocessor Report.

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