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Arm Floats New ISA With Helium

March 5, 2019

Author: Mike Demler

The Arm v8.1-M ISA includes the new M-Profile Vector Extension (MVE), comprising a set of features (code-named Helium) that will enable future Cortex-M CPUs to perform 128-bit vector/SIMD operations. Helium is functionally similar to Cortex-A’s Neon vector/SIMD extensions, but just as helium is a lighter noble gas than neon, Arm v8.1-M can scale to fit the 32-bit data paths and register files in smaller Cortex-M CPUs. Lead customers received early access in 2018, but the company has withheld the names and other details of the initial CPUs based on the new ISA. It expects the first silicon to hit the market in 2021, however.

Helium extends the Arm v8.0-M mainline architecture, which currently appears in Cortex-M33 as well as the security-enhanced Cortex-M35P. The mainline ISA includes DSP/SIMD and FPU options missing from the baseline ISA in the smaller Cortex-M23. In the updated ISA, Helium (like Neon) uses the FPU registers for 128-bit vector processing. But whereas the Aarch64 architecture in Arm v8-A implements 32x128-bit registers in each Neon unit, Arm v8.1-M avoids expanding die area by reorganizing the 32x32-bit FPU registers into just 8x128-bit vector registers.

Arm v8.1-M adds approximately 150 new instructions to Cortex-M CPUs, including complex-math operations, INT8 vector dot products, lane predication, loop predication, and gather/scatter access to load/store memory. Machine-learning performance increases by 15x for matrix-math operations, and FFTs run 5x faster relative to Arm v8.0-M CPUs. Customers will appreciate the performance boost from the new vector/SIMD extensions, which enable them to employ a familiar tool chain for their lightweight DSP and neural-network applications. But the first Helium cores won’t appear until 2021, leaving plenty of time for competitors to update their ISAs.

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