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IBM Power10 Triples Efficiency

August 19, 2020

Author: Linley Gwennap

IBM cut the power on its next-generation Power10 processor. While delivering impressive upgrades in performance and connectivity, the new design also drops the CPU power by half. The result is a mean, green computing machine that’ll squeeze the most performance out of a fixed electricity budget. The high-end server processor targets both data centers and enterprises.

The new processor follows the Power9 family, which entered production in 2018. Last year, IBM announced a Power9 AIO model that previews some of Power10’s connectivity options. Like that model, Power10 employs the Open Memory Interface to enable a variety of external-memory options. But the new chip provides faster 32Gbps serdes, allowing Power10 to upgrade to PCIe Gen5 and boost the throughput of its PowerAxon coherent interfaces.

As disclosed at Hot Chips, a Power10 processor features either 15 massive SMT8 CPUs or 30 powerful SMT4 CPUs along with a capacious 120MB L3 cache. Each quad-thread SMT4 core can decode and execute eight instructions per cycle; an SMT8 doubles those capabilities. Using new AI instructions, an SMT4 can perform 256 operations per cycle for 8-bit integer (INT8) matrix multiplication, matching the throughput of Intel’s newest Xeon cores. IBM hasn’t announced specific models but expects the new design to exceed Power9’s 4.0GHz top speed.

A single-chip Power10 will provide about 75% better performance than Power9 while its lower power draw reduces operating costs. Taking advantage of the chip’s lower power, IBM can fit two processor die into one package. The dual-die model should roughly triple throughput within the same TDP as a single Power9. The company recently received first silicon of the Power10 design in 7nm Samsung technology, and it expects systems using the chip to enter production late next year.

Subscribers can view the full article in the Microprocessor Report.

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