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Intel Xe Targets Multiple Tiers

September 1, 2020

Author: Mike Demler

Intel’s new Xe GPU architecture promises to double graphics performance compared with the previous Gen11 design while operating within the same power envelope. It will debut in Tiger Lake notebook processors, and it will later appear in discrete graphics cards and even a supercomputer accelerator. To achieve this performance gain without the benefits of a 7nm shrink, the company created a new architecture that delivers twice as many pixels per clock at twice the area efficiency and power efficiency. That’s no small feat, but the GPU also benefits from a new transistor design called SuperFin.

The company also plans to deploy the Xe architecture in the data center through its SG1 product for media and cloud streaming, as well as in supercomputers through its HPC design (Ponte Vecchio). Like AMD, it hopes to amortize its GPU development across multiple markets, although tackling so many at once would stretch the resources of even the biggest company. Timely execution will be critical to success, but the recent 7nm delays aren’t helping matters.

The Xe design is a big step forward for Intel. It rearchitects the EUs and realigns the subslice resources to increase efficiency. The optional floating-point and XMX units support HPC and neural-network training. The Xe-LP version offers a big boost for neural-network inference and improves video encoding as well as decoding. Combined with the enhanced SuperFin transistors, these architectural changes should double performance over Gen11, although that bar was rather low. Even so, the Xe should give Intel a sizable advantage for integrated laptop processors while providing an entry into new markets such as discrete graphics cards, producing the biggest changes in the company’s graphics capabilities since it unveiled its first integrated GPU in 2010.

Subscribers can view the full article in the Microprocessor Report.

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