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Neoverse Advances SIMD for HPC

October 20, 2020

Author: Bob Wheeler

It’s been three and a half years since Arm rolled out its Scalable Vector Extension (SVE), providing a path to wider SIMD than 128-bit Neon delivers. Last month, it finally revealed its first CPU to include SVE. Previously known by its Zeus code-name, the Neoverse V1 has dual 256-bit SVE units and a claimed 50% single-thread-performance increase over the Neoverse N1. To facilitate V1 SoC designs, Arm will also supply intellectual-property (IP) blocks for PCI Express Gen5, CCIX 1.1, DDR5, and HBM2e. Although V1 RTL is available now, the company is withholding microarchitecture details. The first disclosed customer is SiPearl, which uses the core in its Rhea processor developed under the European Processor Initiative.

Whereas the Neoverse V1 targets high-performance computing (HPC), another core will provide the upgrade for N1-based server processors. Scheduled for 2021 RTL availability, the Neoverse N2 (Perseus) will support SVE in place of Neon but integrates dual 128-bit units instead of Zeus’s wider units. Arm expects a 40% single-thread-performance increase over the N1 at the same clock speed. For SoC designs, it will add CXL 2.0 IP; interface updates include CCIX 2.0 and HBM3. The company positions the forthcoming Neoverse for cloud computing, where it estimates the N2 will allow 33% more cores per rack than the more power hungry V1. Target customers include Amazon and Ampere, which employ the Neoverse N1.

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