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Think Silicon Spins AI Accelerator

October 27, 2020

Author: Mike Demler

With its new Neox products, Think Silicon targets AI-inference workloads in addition to its traditional graphics customers. Whereas the previous-generation Nema GPU core implements a proprietary instruction set, Neox is based on RISC-V. Because that ISA lacks AI and graphics functions, the Greek company developed its own nonstandard extensions for those features. But tapping the ISA lets the designers employ open-source software tools. As with Nema, Think Silicon will offer Neox as a licensable core. It’s taking customer input before freezing the design and plans to begin licensing by mid-2021, so the new core is unlikely to appear in production devices before 2023.

Think Silicon intends to first offer Neox as a deep-learning accelerator (DLA). The design includes eight single-cycle INT8 MAC units per core, scaling to 512 MAC units in the largest model, which has 64 shader cores. These cores also support 16 INT4 MAC operations per cycle, or four half-precision (FP16) operations. At the projected 800MHz maximum clock frequency in a 28nm design, the Neox DLA will deliver 819 billion INT8 operations per second (GOPS), making it suitable for low-power IoT and similar embedded devices.

Since its founding in 2007, Think Silicon has developed and licensed a line of low-power 2D- and 3D-graphics engines and display controllers, all designed for battery-powered IoT and wearable devices. These Nema GPUs target microcontrollers running an RTOS, but the new architecture increases graphics performance to suit processors running Linux. The company plans to offer the Neox in 4-, 16-, and 64-shader-core models. Running at 800MHz, the largest configuration delivers 410 billion FP16 operations per second (Gflop/s).

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