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SiFive VIU7-256 Takes Vector Lead

November 17, 2020

Author: Aakash Jani

The VIU7-256 is SiFive’s first vector CPU. At the recent Linley Fall Processor Conference, the company introduced the new 64-bit core, built on the newest RISC-V standard. Although the design processes 512-bit vectors, the vector unit is only 256 bits wide (hence the -256 designation), so it requires two cycles per vector computation. By interleaving vector-load and vector-compute instructions, however, the design can achieve full utilization using only one instruction slot per cycle. Preliminary RTL is shipping now.

SiFive reused the base architecture of the U7-series CPU, adding the new vector unit. The VIU7 comprises a 32KB L1 cache, a private 1MB L2 cache, and an optional shared 4MB L3 cache, scalar unit, vector unit, crypto accelerator, and branch-prediction unit. The number of pipeline stages remains the same as the predecessor, yielding a 1.8GHz frequency.

The company designed the core to compete with other vector-enabled embedded CPUs such as the Arm Cortex-A55 and Andes Technology NX27V. Relative to the Andes design, the VIU7 delivers better scalar (general-purpose) performance and has a deep pipeline for greater frequency. SiFive’s core doubles peak vector throughput compared to the Arm core, which has a single 128-bit Neon unit.

At the conference, SiFive also announced the HiFive Unmatched board, a Mini-ITX board that targets Linux PCs. It features a SiFive U740 processor chip and supports standard PC interfaces such as PCI Express, Gigabit Ethernet, and USB. The processor includes four U7-series cores, 2MB of L2 cache, a 64-bit DDR4-2400 DRAM interface, and a PCIe Gen3 x8 interface, but it lacks a GPU. Mouser is preselling the HiFive Unmatched board for $665 with a January shipment date.

Subscribers can view the full article in the Microprocessor Report.

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