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Broadcom SmartToR Ups Flow Scale

January 12, 2021

Author: Bob Wheeler

Last month, Broadcom announced a data-center-switch quadfecta: production of its first Tomahawk 4 chip, sampling of two versions with 100Gbps serdes, and a new chip dubbed Trident SmartToR. Its first Tomahawk 4 (TH4-50G) uses 512x50Gbps serdes to achieve industry-leading bandwidth. The TH4-50G works with shipping 400Gbps optics, but 64 such modules require a 2U form factor for adequate faceplate area. Packing 25.6Tbps into a 1U system requires 32 next-generation 800Gbps modules, the first of which are now sampling. The top new Tomahawk 4 version (TH4-100G) sports 256x100Gbps serdes but is otherwise identical to TH4-50G. Broadcom also sampled the Tomahawk4-12.8T with 128x100Gbps serdes, intended for top-of-rack (ToR) duties where the TH4 features are sufficient.

Whereas the Tomahawk line prioritizes density and performance for hyperscale-network fabrics, the Trident line serves feature-rich applications in smaller data centers and enterprise networks. The new Trident SmartToR is an 8.0Tbps switch that builds on the 7nm Trident 4 (TD4) architecture unveiled in 2019. As the name implies, it’s intended for ToR duties where its 160x50Gbps serdes can aggregate 48x100GbE server connections into 8x400GbE uplinks. Relative to the Trident 3 generation, SmartToR increases table scale by an order of magnitude or more, handling up to three million flows, three million ACL entries, one million VXLAN tunnels, and one million addresses for translation (NAT/NAPT). Compared with the 12.8Tbps TD4, it also adds line-rate packet encryption using either MACSec or IPSec.

Broadcom had planned a straightforward 8.0Tbps version of Trident 4, but it instead developed Trident SmartToR by increasing table memory and adding MACSec. It also revealed features present in the shipping 12.8Tbps TD4, and OEM systems enabling them should be imminent. By sampling the TH4-100G, the company is maintaining its position at the technology leading edge for hyperscale networks.

Subscribers can view the full article in the Microprocessor Report.

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