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Agilex Moves to SuperFin

June 8, 2021

Author: Aakash Jani

Although Intel originally planned to manufacture its Agilex FPGAs in its original 10nm process, the company had nothing but trouble with that technology. The 10nm process ran into problems with its 36nm metal pitch, contact-over-active-gate (COAG) technology, and cobalt interconnects. Yield suffered in myriad ways, resulting in several changes, including the scrapping of COAG. After these changes, we believe the Agilex devices suffered from low clock speeds and higher-than-expected power, much like the 10nm Ice Lake processors.

To address these problems, Intel recently disclosed it has ported Agilex to its second-generation 10nm SuperFin technology, revamping the physical design but preserving most of the front-end logic (RTL). The initial Agilex F-series parts were originally expected to reach general availability in late 2020, but the redesign delayed the schedule. The new version is shipping to lead customers, and we expect it to be generally available by 3Q21.

To verify Intel’s claim that Agilex consumes less power than the 7nm Xilinx Versal products, we looked under the hood at the two FPGA families. Using each company’s power-estimator tool, we compared an Agilex F-series product (AGF027) against the Versal Prime 2902. The test focused on the programmable logic, omitting the effects of Xilinx’s hard CPU cores and AI engines. In this configuration, the Agilex chip consumes 41% less power than its competitor.

Subscribers can view the full article in the Microprocessor Report.

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