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Efinix Fills Out 16nm FPGA Roadmap

June 15, 2021

Author: Bob Wheeler

It’s hard to keep track of some companies’ plans without a scorecard, particularly when the one in question is a nimble startup. That’s the case with Efinix, an FPGA vendor with fewer than 100 employees. About three years after sampling its first chip, a 40nm design, it’s sampling second-generation Trion Titanium FPGAs manufactured in a 16nm FinFET process at TSMC. The latest family members offer greater density and new features.

Because the company’s roadmap seemingly evolves with each announcement, it’s helpful to revisit prior disclosures. Last year, Efinix launched the Titanium family with the now-sampling Ti60 sporting 62,000 logic elements (LEs) and with planned devices scaling to 500,000 LEs. Its recent announcement raises the high end to nearly one million LEs, but the near-term Titanium lineup evolved too. The previously announced Ti200 morphed into the Ti170, which is due to sample in 4Q21.

Following Efinix’s numbering scheme, the Ti170 will have about 170k LEs, but most of the Ti200’s features carry over to the new device. Compared with the Ti60, it will add a pair of MIPI D-PHY ports and a 32-bit DRAM interface that handles LPDDR4 and DDR3/DDR4 memories. The Ti170 should be the first Efinix chip to include PCI Express—specifically, a Gen4 x4 interface. It will pack 616 DSP blocks and 12.6Mbits of SRAM, which customers can use to implement neural networks for AI inference. The Ti170 will come in packages ranging from an 8mm FBGA with 0.5mm pitch to a 16mm FBGA with 0.8mm pitch.

Subscribers can view the full article in the Microprocessor Report.

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