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CertusPro-NX Delivers 10G Serdes

June 29, 2021

Author: Aakash Jani

Continuing to extend its Nexus family, Lattice is again taking advantage of fully depleted silicon-on-insulator (FD-SOI) technology to challenge Intel and Xilinx in low-density FPGAs. Its new CertusPro-NX family brings 96,000 logic cells and adds 10G serdes to expand serial-interface options

The company offers two CertusPro-NX models. The smaller one, the CPNX-50K, has 52,000 logic cells, 3.6Mb of on-die memory, and 96 DSP blocks. The larger part, the CPNX-100K, has 96,000 logic cells, 7.3Mb of on-die memory, and 156 DSPs, as Figure 1 shows. Lattice is already shipping engineering samples of the larger device to lead customers, and it expects both models to reach production in 2Q22.

At its heart, CertusPro-NX implements a fabric of 96,000 programmable logic cells (or LUTs), doubling the count of its predecessor. Each element performs logic, arithmetic, or ROM functions on four inputs. As it did with other Nexus products, Lattice arranged the design in slices that each contain two LUT4s and two registers. Customers can further group the slices by function.

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