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Marvell Adds Vectors to Octeon 10

July 13, 2021

Author: Linley Gwennap

Taking advantage of the buzz around data-processing units, Marvell claims to be the original DPU vendor, tracing back to the first Octeon processor in 2005. Now in its sixth generation, but the first developed since the company acquired the product line in 2018, Octeon has some new tricks. Among them are integrated accelerators for AI as well as for vector packet processing (VPP). Five is the magic number for the new chip, which supports DDR5 memory, PCIe Gen5, 50G Ethernet, and 5nm manufacturing. The sum of these features is Octeon 10.

Octeon targets networking from the edge to the cloud, combining flexible CPU performance with efficient offload engines and high-speed I/O. The initial Octeon 10 design, the CN106xx, features 24 cores of Arm’s Neoverse N2 design running at 2.5GHz. The accelerators, which also include virtualization and cryptography, offload the CPUs to increase overall throughput. Six channels of the latest DDR5 DRAM provide high bandwidth, and the chip supports 200Gbps of traffic through four 50GbE ports. Some models add a 16x50GbE switch.

The CN106xx has already taped out and is scheduled to sample by the end of this year. Next year, Marvell plans to sample additional Octeon 10 designs that extend the line both upward and downward. It’s also likely to produce Octeon 10 variants with integrated baseband DSPs to extend its Octeon Fusion line. Whereas the previous generations, Octeon TX and TX2, were developed in conjunction with server processors, Octeon 10 is unrelated to ThunderX3 (CN110xx), which was announced last year but later canceled. ThunderX3 was a 7nm design using older interfaces and a custom Arm-compatible CPU.

Subscribers can view the full article in the Microprocessor Report.

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