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Golden Cove Adds Matrix Units

September 7, 2021

Author: Linley Gwennap

Golden Cove returns Intel to its traditional two-year cadence for major microarchitecture improvements while providing a strong instructions-per-cycle (IPC) upgrade. To boost performance, the new CPU makes extensive changes from the earlier Sunny Cove design. It also introduces matrix acceleration to enable much greater performance for AI and scientific workloads. Golden Cove will power the upcoming Sapphire Rapids server processor and Alder Lake PC processor; the latter is due to enter production by the end of this year.

The headline feature is the Advanced Matrix Extensions (AMX), which define new registers and instructions that natively process matrix operations—similar to the approach Nvidia’s tensor cores employ. Using the new instructions, Golden Cove delivers 8x greater peak performance relative to the older AVX-512 instructions. For general-purpose code, it widens the front end with a sixth instruction decoder and the back end with extra load and integer units. A larger reorder buffer and wider scheduler support the new units. As a result, the company claims Golden Cove will yield an average IPC gain of 19% across a range of common benchmarks.

Intel’s multiyear delay on 10nm stalled not only its fab train but also its microarchitecture roadmap, as the company canceled products based on the 10nm Palm Cove CPU. As a result, Skylake remained its flagship microarchitecture for four years until Sunny Cove arrived in 2019, offering an 18% IPC gain. Despite the new name, last year’s Willow Cove was merely Sunny Cove with a larger L2 cache, but Golden Cove delivers another leap forward, putting the tock back in the old tick-tock model.

Subscribers can view the full article in the Microprocessor Report.

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